Not show this behavior as there is no DFE tuning involved. Tuning is completed again, in JNP-MIC1 MIC. RX without stopping the earlier run, there will be errors until DFE The earlier run, then difference in the behavior of JNP-MIC1-MACSECĭecision feedback equalization (DFE) tuning is required If TX or RX is started consecutively without stopping With Error Count 0 (point 1) and if TX is started, RX need not be MIC, if TX is interrupted, the RX displays the state as "Disabled" Even if TX is startedĪgain, RX also must to be restarted to work properly. In case of JNP-MIC1 MIC, if TX is interrupted, the RXĭisplays the state as failed with error counts. JNP-MIC1-MACSEC MIC (flip is only supported in JNP-MIC1-MACSEC). In case of JNP-MIC1 MIC and state “disabled” in case of If any mismatch is encountered between the pattern-typeĪnd flip between TX and RX, the maximum error counts are observed Lane 3 : State : Fail, Error count : 4294967295 Lane 2 : State : Fail, Error count : 4294967295 Lane 1 : State : Fail, Error count : 4294967295 Lane 0 : State : Fail, Error count : 4294967295 Lane 3 : State : Disabled, Error count : 0įor Example: On JNP-MIC1 MIC test interface et-0/0/1 prbs-test-start pattern-type 31 direction 1 flip show interfaces et-0/0/1 prbs-stats Lane 2 : State : Disabled, Error count : 0 Lane 1 : State : Disabled, Error count : 0 Lane 0 : State : Disabled, Error count : 0 With Error count as 0, where the JNP-MIC1 MIC displays as failed withįor Example: On JNP-MIC1-MACSEC MIC test interface et-0/1/10 prbs-test-start pattern-type 31 direction 1 flip show interfaces et-0/1/10 prbs-stats Signal, then the "state" in the show interfaces interface-name prbs-stats displays as “Disabled" On JNP-MIC1-MACSEC MIC, if RX is not latching to any PRBS While collecting statistics, the JNP-MIC1-MACSEC and JNP-MIC1
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